$(1) LIT N5REG . DEFINE THE REGISTERS DLD7* L,T3 AA1,TT5,BB1 . NEXT TRIAD TO PROCESS . SLJ TON$ AN,M AA1,1 TE AA1,BB1 . TEST SEQUENTIAL PROCESSING J FLD7B FLD7A L AA1,ALGI . FLD PROCESSING EFFECTIVELY A,M AA1,2 . PROCESSES THREE TRIADS AT ONCE S AA1,ALGI SZ SUBEXD+2 . EXPRESSION NUMBER 2 IS USED SZ SUBEXQ+2 . TO MAKE DUMMY REQUEST SZ RTS . FLAG IS ZERO ON RIGHT SIDE J FLD FLD7B L BB1,LALGI . LAST TRIAD INDEX L,T3 AA1,TT5,BB1 . CURRENT TRIAD F(I) LINK FROM DET S,T3 AA1,TT5,B11 . TO LAST TRIAD TO CORRECT LINKAGE S B11,ALGI . RESET CURRENT TRIAD NUMBER SZ,S1 TT5,B11 . CLEAR ARG INDICATOR FOR ALG2 L,M B11,1,BB1 . BUILD LINK TO NEXT FLD TRIAD L,T3 AA1,TT5,BB1 . CURRENT TRIAD LINK S,T3 B11,TT5,BB1 . SET CURRENT TRIAD WITH CORRECTED LINK FLD7C L B11,AA1 . INDEX FOR NEXT LINK L,T3 AA1,TT5,B11 . NEXT LINK IN NON-SEQUENTIAL PART OF CH TE,M AA1,1,BB1 . TEST FOR LINK TO NEXT FLD TRIAD J FLD7C . NOT YET CONTINUE SEARCH S,T3 BB1,TT5,B11 . YES LINK THIS ONE TO CURRENT TRIAD J ALG2 . PROCESS NON SEQ PART OF CHAIN DLD10* L,T3 AA1,TT5,BB1 . SLJ TON$ AN,M AA1,1 . TEST FOR SEQUENTIAL CHAIN PROCESSING TE AA1,BB1 J FLD7B L AA1,ALGI . ENTRANCE FOR LEFT SIDE A,M AA1,3 . PROCESSING A LEFT SIDE FLD S AA1,ALGI . EFFECTIVELY DOES 4 TRIADS AT ONCE SZ SUBEXD+2 . EXPRESSION 2 IS USED TO MAKE SZ SUBEXQ+2 . A DUMMY REQUEST S AA1,RTS . THE NEXT SECTION TESTS FOR VALID QUANTITIES TO STORE INTO L,S1 AA1,TT2+2,BB1 TNE,M AA1,3 . TEST FOR CONSTANT J FLDER TNE,M AA1,5 . CAN NOT STORE INTO AN EXPRESSION J FLDER TNE,M AA1,6 . CAN STORE INTO EXPRESSION IF IT J FLD . IS A SUBSCRIPT, OFFSET OR FLD L,H2 B11,TT2+2,BB1 L,S2 AA1,TT3,B11 . TEST FOR SUBSCRIPT OR OFFSET TNE,M AA1,15 . SUBSCRIPT OPERATOR J FLD TNE,M AA1,19 . OFFSET OPERATOR J FLD L AA1,(0102001000056) . FLD OPERATOR TNE AA1,TT3,B11 J FLD FLDER L AA1,(050000,1) . FUDGE UP LEFT SIDE OF EQUALS S AA1,TT2+2,BB1 . SO COMPILATION WILL NOT STOP L AA1,ITEM . ERROR IMPOSSIBLE ITEM TO STORE INTO S,H1 AA1,FLERA LMJ B11,ERFP . FILE ERROR MESSAGE FOR BAD ITEM +FLERA . ON LEFT SIDE OF EQUALS J PHS5G FLDRZ L,H1 AA1,N5ERLA . GENERATE ERROR MESSAGE S,H1 AA1,FLERA . INDICATING POLISH IS MESSED UP LMJ B11,ERFP +FLERA J PHS5G FLD . THIS ROUTINE PROCESSES GENERATION FOR FLD FUNCTION L BB2,ALGI . NUMBER OF NEXT TRIAD TO PROCESS L AA1,TT3,BB2 . TEST FOR FLD OPERATOR AND AA1,(0777700,077) TE AA2,(0102000,056) J FLDRZ . POLISH IS GOOFED UP L,S4 AA1,TT1+1,BB1 AND,M AA1,040 S AA2,FLDSEX . SET FLAG FOR SIGN EXTENSION L,T1 AA1,TT1,BB1 . TEST STARTING BIT TE,M AA1,0301 . TEST FOR IMMEDIATE CONSTANT J FLD2 . FIELD BOUNDARIES NOT KNOWN AT COMPLE T L,T1 AA2,TT2,BB1 . TEST WIDTH TE,M AA2,0301 . TEST IMMEDIATE CONSTANT J FLD2 . FIELD BOUNDARIES NOT KNOWN AT COMPILE TP,XH2 TT1,BB1 . FIRST BIT MUST BE POSITIVE J FLDER TP,XH2 TT2,BB1 . WIDTH MUST BE POSITIVE J FLDER TZ RTS . TEST IF FLD RIGHT OF EQUALS J FLD4A . LOOK FOR J FACTORS LEFT OF EQUALS LN,XH2 AA2,TT2,BB1 N-72 A,M AA2,72 L,XH2 AA1,TT1,BB1 . F FROM LEFT; F+N FROM RIGHT FLD4B AU AA2,AA1 . COMPUTE LAST BIT OF FIELD TG,M AA3,73 . TEST IF FIELD LIES WITHIN WORD J FLDER SZ AA3 . FLAG FOR WHICH WORD J FACTOR IS IN TG,M AA1,36 . SEE IF FIRST BIT IN SECOND WORD L,M AA3,36 AN AA1,AA3 MAKE J FACTOR APPEAR AS IN IN FIRST WORD LSSC AA1,9 A AA1,AA2 . COMPUTE F,N FOR SEARCH L,S1 R1,COMFL . NUMBER TO SEARCH FOR L B11,(1,0) . SEARCH REGISTER A,S2 B11,COMFL . SET FOR QUARTER WORD SEARCHES SE,H2 AA1,FLDJ,*B11 . TEST IF FLD IS J FACTOR J FLD2 . IT WAS NOT A PROPER J DESIGNATOR TZ,S3 FLDJ-1,B11 . SEE IF SIGN EXTENSION MATTERS J FLD3 . SIGN EXTENSION MUST BE CONSIDERED FLD4 L AA1,FLDJ-1,B11 . J DESIGNATOR AND AA1,(07400,0) . ISLOATE J FACTOR TZ AA3 . SEE IF J FACTOR IN SECOND WORD A AA2,(020,0) . AN OFFSET OF ONE S AA2,TT11,BB1 . SAVE J FACTOR S AA2,SVTBL+1 L,M B11,TT2+2,BB1 . COMPUTE LOCATION OF ENTITY TNZ RTS . TO TAKE FIELD OF L,M B11,TT2+1,BB1 S,H2 B11,TT11,BB1 . J FACTOR WILL BE ORED ON TO THIS L AA1,TT11,BB1 . TT11 CONTAINS INSTRUCTIONS FOR COUNTIN S AA1,TT11+2,BB1 . THIS IS MOVE TO TRIAD THAT IS FLD TZ RTS . FLDS LEFT OF EQUAL HAVE AN EXTRA TRIAD S AA1,TT11+3,BB1 L,M B11,3,BB1 . SET TO POTENTIAL EQUAL SIGN TNZ IOLST . TEST IF IN IOLST TZ RTS . DO NOT TEST FOR "IF" ON LEFT OF EQUALS J FLIOLS . TEST IF PART OF IO LIST L,S2 AA1,TT3,B11 . OPERATOR SUB CODE TE,M AA1,1 . TEST FOR EQUALS OPERATOR J ALG2 L,S1 AA1,TT1,BB1 TNZ FLDSEX . ALLOW SIGNED FIELDS TE,M AA1,7 . A DUMMY ITEM SIGNIFIES AN "IF" J ALG2 . EQUALS IS NOT ARITHMETIC IF L,S2 AA1,ITEM . OPERATOR SUBCODE TE,M AA1,1 . ONLY FOR ARITHMETIC IF J ALG2 TLE,H2 AA1,TT1,B11 . SPECIAL ITEM FOR COMPUTED GO TO J ALG2 SLJ SV . THIS SAVES PARAMETERS FOR IF L,M AA1,FLD90 . SET LOCATION FOR FLD CODING WHEN S AA1,FLARG . ARITHMETIC IF IS PROCESSED J PHS5G . GO PARSE NEXT TRIAD FLIOLS TNZ IOLST . TEST IF WITHIN AN IO LIST J ALG2 TZ RTS . THERE IS ONE MORE TRIAD LEFT OF EQUALS A,M B11,1 . OF THE EQUALS L,S2 AA1,TT3,B11 . OPERATOR SUBCODE TE,M AA1,1 . TEST FOR EQUALS J ALG2 SLJ CLOB1 . DEASSIGN THE VOLATILE REGISTERS SZ,H2 IOFLX1 . PREVENT SHORT IO LIST L BB1,ALGI TNZ,H1 IOLST . TEST INPUT OR OUTPUT LIST J FLIOLA . GO PROCESS OUTPUT LIST SLJ GEN PCI 0,TT1+1,BB1 PCI 0,(((A0))-3) MI 1,FNIO3U,NAME . HENERATE CALL TO . INTERFACE TO FORTRAN IO TO PROCESS EXPRESSION EX $+1 . RETURN TO NORMAL CODING L,H1 AA1,OLDITM+1 . SET A FIELD IN SLJ TO A,M AA1,020 . TO HAVE A ONE WHICH S,H1 AA1,OLDITM+1 . REPRESENT INTEGER SLJ GENR MI 1,(SA P2,P1) . STORE VALUE IN PART WORD EX PHS5G . PROCESS AN OUTPUT LIST WITH A J FACTOR FLIOLA SLJ GEN PCI 0,TT1+1,BB1 . EXPRESSION TO OUTPUT PCI 0,(((A0))-3) . REGISTER TO USE TE,S P1,$+3,1 MI 1,(LA P2,P1) . LOAD EXPRESSION INTO REGISTER MI 1,FNIO4U,NAME J $+2 MI 1,(LN P2,P1) . LOAD EXPRESSION OF NEGATIVE EX $+1 . RETURN TO NORMAL CODE L,H1 AA1,OLDITM+1 . SET A FIELD IN SLJ TO HAVE A,M AA1,020 . A ONE WHICH REPRESENTS INTEGER S,H1 AA1,OLDITM+1 J PHS5G . SET UP SEARCH PARAMETERS TO THE LEFT OF THE EQUALS FLD4A L,H2 AA2,TT2,BB1 . FIELD WIDTH L,H2 AA1,TT1,BB1 . FIRST BIT OR FIRST BIT + WIDTH J FLD4B . WAS COUNTED FROM LEFT FLD3 TZ RTS . NON ZERO IS LEFT OF EQUALS J FLD4 . THIRD WORD OK LEFT OF EQUALS TNZ FLDSEX . TEST FOR SIGN EXTENSION J FLD2SG L,S3 AA1,FLDJ-1,B11 . NON ZERO INDICATES SIGN EXTENSION TLE,M AA1,3 J FLD4 . USE PRESENT J FACTOR A B11,AA1 . CONVERT HALF WORD TO SIGN EXTENSION J FLD4 FLD2SG TG,M AA1,3 J FLD4 . USE H1 OR H2 FLD2 TZ RTS . NON ZERO IS LEFT OF EQUALS J FLD6 . GENERATE FOR LEFT OF EQUALS L,T1 AA1,TT1,BB1 . STARTING BIT TE,M AA1,0301 . TEST FOR IMMEDIATE CONSTANT J FLD2AX L,T1 AA1,TT2,BB1 . WIDTH TE,M AA1,0301 . TEST FOR IMMEDIATE CONSTANT_ J FLD2AX L,H2 AA1,TT1,BB1 . VALUE OF FIRST BIT TG,M AA1,36 . SEE IF FIRST BIT IN FIRST WORD J FLD2LW A,H2 AA1,TT2,BB1 . SEE IF FLD SPANS BOUNDARIES TG,M AA1,36 J FLD2AX . NO OPTIMIZATION FLD2LW L,S2 AA1,TT3+3,BB1 . TEST TRIAD AFTER FLD FOR EQUALS TE,M AA1,1 J FLD2AX L,S1 AA1,TT1+3,BB1 . IF OPERAND LEFT OF EQUALS IS TE,M AA1,7 . A DUMMY THEN IT IS A N IF J FLD2AX SLJ SV . SAVE NECESSARY PARAMETERS L,M AA1,FLD80 . SET ENTRANCE INTO FLD FROM S AA1,FLARG . IF PROCESSING . THE NEXT SECTION DETERMINES N AND F FROWIDTH AND STARTING BIT . FROM WHICH A MASK AND J FACTOR CAN BE DETERMINED L,H2 AA2,TT2,BB1 . 72-WIDTH AN,M AA2,72 SN AA2,SVTBL+14 SN,H2 AA2,TT2,BB1 . WIDTH L,H2 AA1,TT1,BB1 . FIRST BIT FLD2R2 S AA1,SVTBL+13 SLJ FLD76 . COMPUTE MASK AND J FACTORS S AA3,SVTBL+15 . SAVE MASK S AA1,SVTBL+16 . SAVE J FACTOR J PHS5G . RETURN TO NORMAL PROCESSING FLD2AX L,T3 AA1,TT1,BB1 . FIRST BIT S,H2 AA1,FLDA7 . A LDSC INST L,T3 AA1,TT2,BB1 . WIDTH S,H2 AA1,FLDA3 . A DSL INST S,H2 AA1,FLDA3S . SET FOR SIGN EXTENSION SLJ GEN PCI 0,TT2+1,BB1 . MEMORY LOCATION PCI 0,(050000,2) . FOR DUMMY REQUEST PCI 0,TT3+2,BB1 . TRIAD TO ASSOCIATE RESULT WITH PCI 0,TT1,BB1 . FIRST/LEFT, FIRST+WIDTH/RIGHT PCI 0,TT2,BB1 . 72-WIDTH SLJ AREQ1C . CONDITIONAL DESTRUCTIVE REQUEST PCI 0,P2 . FIND A SCRATCH REGISTER J $+1 . RETURN HERE IF LOADED EX $+1 . RETURN TO NORMAL CODE TNZ,H1 IOLST . NON ZERO IN OUTPUT LIST J FLD2AP L,M AA1,PZERO S AA1,PZERO L,M AA1,A0 . SET TO USE REGISTER A0 S AA1,PZERO+3 . FORCE A0 FOR IO FLD2AP SLJ GENR . RETURN TO GENERATOR TE,S P1,FLD22J,1 . TEST IF OPERAND IS NEGATIVE MI 1,(DL P0,P1) . LOAD WORD TO EXTRACT FIELD FROM J FLD22K FLD22J MI 1,(DLN P0,P1) . GET POSITIVE FORM OF OPERAND MI 1,(DA P0,(0)),CON . ELIMINATE MINUS SIGN FLD22K TE,ID P4R,FLD21,3 . TEST FOR CONSTANT FLD22 MI 1,*(LDSC P0,P4) . FIRST BIT FLD222 TE,ID P5R,FLD23,3 . TEST FOR CONSTANT EX $+1 . RETURN TO NORMAL CODE TZ FLDSEX . NEGATIVE IMPLIES SIGN EXTENSION J FLD22S SLJ GENR . RETURN TO GENERATOR MI 1,*(DSL P0,P5) . 72-WIDTH FLD24 SA,U 1,P0 . SHOW RESULT IN UPPER REGISTER EX $+1 TNZ,H1 IOLST . NON ZERO IN OUTPUT LIST J FLD2AQ SLJ GENR MI 1,FNIO3U,NAME . SLJ TO FORTRAN IO INTERFACE EX $+1 L AA1,OLDITM+1 . SET A FIELD IN SLJ TO OR AA1,(020,0) . A ONE WHICH IS INTEGER S AA2,OLDITM+1 FLD2AQ SLJ GENR . RETURN TO GENERATOR SLJ MRSLT . SHOW WHERE RESULT IS PCI 0,P3 SLJ DEASN . IF AN A-REGISTER REQUEST IS NOT MADE PCI 0,P1 . FOR A TRIAD THEN DEASN HAS TO BE CALLE SLJ DEASN . TO DEASNIGN THE TRIAD PCI 0,P4 SLJ DEASN PCI 0,P5 EX ALG2 . GO TO NEXT TRIAD FLD22S SLJ GENR MI 1,*(DSA P0,P5) . 72 - WIDTH J FLD24 FLD21 SLJ TSSC . TEST IF SHIFT CAN BE REMOVED +72,P4 J FLD27 . SHIFT CAN NOT BE REMOVED J FLD222 . SHIFT CAN BE REMOVED FLD23 SLJ TSSC . TEST IF SHIFT CAN BE REMOVED +72,P5 J $+2 . SHIFT CAN NOT BE REMOVED J FLD24 . SHIFT CAN BE REMOVED EX $+1 . RETURN TO NORMAL CODE TZ FLDSEX . NON ZERO IMPLIES SIGN EXTENSION J FLD23S SLJ GENR . RETURN TO GENERATOR MI 1,FLDA3,ABS . DSL BY 72-WIDTH J FLD24 FLD23S SLJ GENR MI 1,FLDA3S,ABS . DSA BY 72-WIDTH J FLD24 FLD27 MI 1,FLDA7,ABS . LDSC P0,$-$ J FLD222 FLD62B SLJ GENR . RETURN TO GENERATOR MI 1,FNIO3U,NAME . SLJ TO FORTRAN IO INTERFACE MI 1,(LA P0,P1) . LOAD VALUE OF EXPRESSION EX $+1 . RETURN TO NORMAL CODE L AA1,OLDITM+1 . SET A FIELD OF SLJ TO OR AA1,(020,0) . A ONE WHICH INDICATES INTEGER S AA2,OLDITM+1 . SET INTEGER MODE L,M AA1,PZERO S AA1,PZERO L,M AA1,A0 . FORCE USE OF A0 S AA1,PZERO+3 J FLB71 FLD62 . THIS SECTION GENERATES A STORE FOR AN ARBITRARY FIELD TNZ IOLST . TEST IF FIELD IS WITHIN IO LIST J FLD62A L,M B11,4,BB1 . TEST IF NEXT OPERATOR IS EQUALS L,S2 AA1,TT3,B11 . OPERATOR SUBCODE TE,M AA1,1 J FLD62A . NO IT IS NOT EQUALS SLJ CLOB1 . DEASIGN VOLATILE REGISTERS SZ,H2 IOFLX1 . PREVENT SHORT IO LIST TNZ,H1 IOLST . NON ZERO IS OUTPUT LIST J FLD2AQ . OUTPUT LIST AS IF RIGHT OF EQUALS FLD62A SN,H2 AA1,ARQFND . SET TO NOT COUNT ON FIRST SEARCH SLJ GEN PCI 0,TT2+2,BB1 . MEMORY LOCATION PCI 0,TT2+4,BB1 . ITEM TO STORE PCI 0,TT3+3,BB1 . TRIAD TO ASSOCIATE RESULT WITH PCI 0,TT2+1,BB1 . FIRST BIT PCI 0,TT1,BB1 . FIRST BIT PCI 0,TT2,BB1 . N BOTH SLJ AREQ1C . MARK WHOLE WORD PCI 0,P1 . QUANTITY NOT ANY LONGER IN REGISTER J $+1 . IGNORE FACT IT WAS LOADED TE,ID P2,FLD72,3 . MAKE SPECIAL CASE OUT OF ZERO AND ONE FLD71 EX $+1 . IGNORE FACT IT WAS LOADED TZ IOLST J FLD62B SLJ GENR . RETURN TO GENERATOR SLJ AREQ1 . LOAD ITEM TO STORE PCI 0,P2 EX $+1 . FREE UP NEXT REGISTER L,T3 BB3,PZERO+3 A,M BB3,2 . SET TO NEXT REGISTER PAIR L,M AA1,0 . DEASSIGN A SINGLE REGISTER PAIR LMJ B11,DONEA . GO DEASSIGN THE REGISTER SLJ GENR . RETURN TO GENERATOR TE,U P0,$+3,0 . TEST IF QUANTITY IS CURRENTLY SA,U 0,P0 . IN UPPER REGISTER MI 1,(DSC P0,36),ABS . MOVE RESULT TO LOWER REGISTER TE,S P0,$+3,0 . TEST IF LOADED NEGATIVELY MI 1,(LN P0,P0) . REVERSE SIGN MI 1,(AA P0,0,0,M),ABS . REMOVE MINUS SIGN MI 1,(DL P0,*P1) . LOAD OPERAND TO STORE INTO SLJ UPA . ADD ONE TO REGISTER OF LAST INSTRUCTIO EX $+1 . RETURN TO NORMAL CODE FLB71 . SLJ GENR . RETURQ TO NORMAL CODE TE,ID P5R,FLD61,3 . TEST IF FIRST BIT IS A CONSTANT MI 1,*(LDSC P0,P5) . DO INDIRECT SHIFT FLD633 SLJ UPA . INCREASE REGISTER ON LAST COMMAND TE,ID P6R,FLDA61,3 . TEST IF WIDTH IS CONSTANT MI 1,*(LSSL P6) . SHIFT BT WIDTH FLDA611 SLJ UPA . INCREASE REGISTER ON LAST INST FLD63 TE,ID P6R,FLD64,3 . TEST IF WIDTH IS A CONSTANT MI 1,*(DSL P0,P6) FLD65 TE,ID P5R,FLD66,3 . TEST IF FIRST BIT IS CONSTANT MI 1,*(DSC P0,P5) . SHIFT BY FIRST BIT FLD67 SLJ UPA FLD677 EX $+1 . RETURN S GB1,TREQFL SLJ GENR MI 1,(DS P0,P1) . STORE RESULT SLJ UPA . INCREASE REGISTER ON LAST COMMAND SLJ DEASN . IF A TRIAD IS NOT REFERENCED PCI 0,P1 . BY AN A-REGISTER REQUEST IT SLJ DEASN . MUST BE DEASIGNED BY DEASN PCI 0,P4 SLJ DEASN PCI 0,P5 SLJ DEASN PCI 0,P6 EX PHS5G FLD6 L AA1,TT2,BB1 . WIDTH S,H2 AA1,FLDA9 . LSSL S,H2 AA1,FLDA5 . DSL L AA1,TT1,BB1 . FIRST BIT S,H2 AA1,FLDA2 SSC P0,$-$ S,H2 AA1,FLDA7 . LDSC J FLD62 FLD61 SLJ TSSC . TEST IF SHIFT CAN BE REMOVED +72,P4 J FLD69 . SHIFT CAN NOT BE REMOVED J FLD63 . SHIFT CAN BE REMOVED FLDA61 MI 1,FLDA9,ABS . LSSL J FLDA611 FLD64 MI 1,FLDA5,ABS . DSL P0,$-$ J FLD65 FLD66 SLJ TSSC . TEST IF SHIFT CAN BE REMOVED +72,P5 J $+2 . SHIFT CAN NOT BE REMOVED J FLD677 . SHIFT CAN BE REMOVED MI 1,FLDA2,ABS , SSC P0.$-$ J FLD67 FLD69 MI 1,FLDA7,ABS . LDSC P0,$-$ J FLD633 FLD72 TNE,ID P6R,FLD71,3 . STARTING BIT NOT CONSTANT TNE,ID P5R,FLD71,3 . WIDTH NOT CONSTANT EX $+1 . RETURN TO NORMAL CODE L,M AA2,0301 TE,T1 AA2,TT2+4,BB1 . TEST IF VARIABLE BEING STORED WAS J FLD71W . A CONSTANT L,H2 AA1,TT2+4,BB1 JZ AA1,FLD72J . ZERO IS BEING STORED TE,M AA1,1 . SEE IF ONE IS BEING STORED J FLD71W L,H2 AA1,TT2,BB1 . EXAMINE WIDTH TE,M AA1,1 . SPECIAL CASE FOR FIELD ONE WIDE J FLD71W FLD72J . L,H2 AA2,TT2,BB1 . WIDTH L,H1 AA2,TT1,BB1 . FIRST BIT S AA1,SVTBL+13 TNZ,H2 TT2+4,BB1 . TEST ENTITY TO STORE J FLD75 . RESULT WAS ZERO L,H2 AA2,TT1,BB1 . FIRST BIT SZ AA1 . PREPARE FOR DIVIDE SZ AA5 . NON ZERO IF STARTING BIT IN SECOND WOR TLE,M AA2,36 . TEST STARTING BIT IN SECOND WORD J $+3 AN,M AA2,36 . BRING STARTING BIT INTO FIRST WORD L,M AA5,1 . SET OFFSET FOR SECOND WORD S AA5,SVTBL+1 DI,M AA1,6 . DETERMINE WHICH SIXTH AN,M AA1,13 . CONVERT TO A J FACTOR LN AA1,AA1 A,M AA2,31 . COMPUTE LEFT SHIFT S AA2,B11 L,M AA2,1 SSC AA2,0,B11 . COMPUTE QUANTITY TO OR IN SSC AA1,10 . MOVE J FACTOR INTO POSITION S,H2 AA2,FLD71B AU AA1,(LA P7R,*P1) S AA2,FLD71A AU AA1,(SA P7R,P1) S AA2,FLD71C S AA1,JDESFL S GB1,TREQFL SLJ GENR . RETURN TO GENERATOR SLJ FSRG . FIND SCRATCH REGISTER FOR OR MI 1,FLD71A . LA P7,P1 EX $+1 . RETURN TO NORMAL CODE L AA5,SVTBL+1 . RESTORE SMALL OFFSET S,S3 AA5,OLDITM . SET SMALL OFFSET SLJ GENR . RETURN TO GENERATOR MI 1,FLD71B,ABS . OR,M P7R,1 MI 1,FLD71C . SA P7,*P1 EX $+1 L AA5,SVTBL+1 . RESTORE SMALL OFFSET S,S3 AA5,OLDITM . SET SMALL OFFSET SLJ GENR SLJ UPA . INCREASE LAST REGISTER USED BY ONE EX PHS5G . RETURN TO NEXT STATEMENT $(2) . FLD71A LA P7,P1 FLD71B OR,M P7R,1 FLD71C SA P7,*P1 $(1) FLD75 SLJ FLD76 . BUILD MASK TO EXTRACT FIELD SSC AA1,10 . J FACTOR AU AA1,(LA P7R,*P1) S AA2,FLD75A AU AA1,(SA P7R,P1) S AA2,FLD75B S AA1,JDESFL JZ AA1,FLD75W . USE WHOLE WORD L AA1,(MI 1,FLD75C,ABS) . AND,M P7R,0 S AA1,FLD75E S,H2 AA3,FLD75C S GB1,TREQFL FLD75T SLJ GENR . RETURN TO GENERATOR SLJ FSRG . FIND SCRATCH REGISTER FOR ANDING MI 1,FLD75A . LA P7,P1 EX $+1 . RETURN TO NORMAL CODE L AA5,OFFSET . RESTORE SMALL OFFSET S,S3 AA5,OLDITM SLJ GENR J FLD75E . NEXT INSTRUCTION IS MODIFIED $(2) . FLD75E MI 1,FLD75C,ABS . AND,M P7R,0 MI 1,FLD75B . SA P7,*P1 EX $+1 L AA5,OFFSET . RESTORE SMALL OFFSET S,S3 AA5,OLDITM SLJ GENR SLJ UPA EX PHS5G $(2) FLD75A LA P7,P1 FLD75B SA P7,*P1 FLD75C AND,M P7R,0 FLD75D AND P7R,FLD75G FLD75G +0 . WHOLE WORD MASK FLD71W SLJ GENR . RETURN TO GENERATOR J FLD71 FLD75W S AA3,FLD75G L AA1,(MI 1,FLD75D,CON) S AA1,FLD75E J FLD75T FLD76R L B11,TT2,BB1 . WIDTH OF FIELD L AA3,(-0) . ALL ONES TO FORM A MASK SSL AA3,0,B11 . FORM AS MANY ZEROES AS FIELD WIDTH L B11,TT1,BB1 . FIRST BIT POSITION L,M AA1,0,B11 SZ AA5 . IF ONE USE NEXT HIGHER WORD TLE,M AA1,36 . SEE IF FIRST BIT IN SECOND WORD J $+3 AN,M AA1,36 L,M AA5,1 . SETT SMALL OFFSET TO ONE S AA5,OFFSET SSC AA3,0,B11 . AA3 NOW CONTAINS A MASK FOR FIELD TG,M AA1,18 . SEE IF MASK FITS IN HALF WORD J FLD76B AU,H2 AA1,TT2,BB1 . WIDTH TLE,M AA2,17 . SEE IF IT FITS IN H1 J FLD76C . USE H1 TLE,M AA1,12 . FIELD MAY BE IN H1 J FLD76A . MUST USE WHOLE WORD FL76A A,H2 AA1,TT2,BB1 TG,M AA1,24 J FLD76A . MUST USE WHOLE WORD SSL AA3,12 L,M AA1,6 . J FACTOR FOR T2 J *FLD76 FLD76A TNE,M AA1,12 J FL76A L,M AA1,0 J *FLD76 FLD76B L,M AA1,1 J *FLD76 FLD76C L,M AA1,2 SSL AA3,18 J *FLD76 . THIS SECTION GENERATES CODE FOR AN ARITHMETIC IF . OF A FLD WHICH DID NOT REDUCE TO A J FACTOR FLD80 SLJ STUPIF . RESTORE IF PARAMETERS L AA1,SVTBL+14 . WIDTH TNE,M AA1,1 J FLD81 . SPECIAL CASES FOR 1 BIT FIELD FLD82 L AA1,SVTBL+16 . J FACTOR LN AA3,SVTBL+15 . MASK SSC AA1,10 . J FACTOR S AA1,JDESFL AU AA1,(LA P7R,P1) S AA2,FLD80A JZ AA1,FLD80W L AA1,(MI 1,FLD80C,ABS) S AA1,FLD80E S,H2 AA3,FLD80C FLD80T SLJ GENR . RETURN TO GENERATOR SLJ FSRG . FIND SCRATCH REGISTER FOR ANDING MI 1,FLD80A EX $+1 L AA5,OFFSET S,S3 AA5,OLDITM J FLD80E FLD8JE TNE,ID P2,FLD80P,7 MI 1,(JNZ P7R,P3) SLJ UPA . INCREASE A FIELD ON LAST INST EX PHS5G FLD80P MI 1,(JZ P7R,P2) SLJ UPA TNE,ID P3,FLD80Q,7 EX PHS5G FLD80Q MI 1,(J P3) EX PHS5G FLD80W S AA3,FLD80G L AA1,(MI 1,FLD80D,CON) S AA1,FLD80E J FLD80T $(2) . FLD80A LA P7R,P1 FLD80C AND,M P7R,0 FLD80D AND P7R,FLD80G FLD80G +0 FLD80E MI 1,FLD80D,CON J FLD8JE $(1) . FLD90 . THIS GENERATES CODE FOR THE ARITHMETIC IF OF A FLD FUNCTION . REDUCES TO A J FACTOR SLJ STUPIF . RESTORE IF PARAMETERS L AA1,SVTBL+1 . J FACTOR S AA1,JDESFL AU AA1,(TNZ P1) S AA2,FLD90A AU AA1,(TZ P1) S AA2,FLD90B FLD90Z SLJ GENR . GEN WAS ENTERED FIRST IN STUPIF TE,ID P2,FLD9A1,7 . FALL THRU ON ZERO JUMP TE,ID P3,FLD9A2,7 MI 1,FLD90A MI 1,(J P2) MI 1,(J P3) EX PHS5G $(2) . FLD90A TNZ P1 FLD90B TZ P1 $(1) . FLD9A1 MI 1,FLD90B MI 1,(J P3) EX PHS5G FLD9A2 MI 1,FLD90A MI 1,(J P2) EX PHS5G FLD81 LM AA1,SVTBL+13 L B11,(1,0) . USED TO SEARCH FOR J FACTORS L,T1 AA2,COMFL L,M R1,2 . ALLOW NO THIRD WORDS TNE,M AA2,01400 L,M R1,4 . ALLOW NO THIRD WORDS SE,H2 AA1,FLIFT,*B11 . SEARCH FOR J FACTORS WHICH HAVE J FLD82 L,H1 AA1,FLIFT-1,B11 . J FACTOR SSC AA1,10 S AA1,JDESFL AU AA1,(TN P1) S AA2,FLD90A AU AA1,(TP P1) S AA2,FLD90B J FLD90Z FLIFT +0,0 +3,18 +6,12 +5,24 $(2) RSR L B11,SVTBL+9 TNZ SVTBL+9 . NO TRIADS TO RESTORE J *RS L AA1,SVTBL+6 S AA1,TT1,B11 L AA1,SVTBL+7 S AA1,TT2,B11 L AA1,SVTBL+8 S AA1,TT3,B11 TNZ SVTBL+5 J *RS . THERE WAS ONLY ONE TRIAD TO RESTORE L AA1,SVTBL+2 S AA1,TT1,B11 L AA1,SVTBL+3 S AA1,TT2,B11 L AA1,SVTBL+4 S AA1,TT3,B11 J *RS . THIS SECTION SETS UP THE PARAMETERS FOR THE . ARITHMETIC IF WHICH WERE STORED WHEN . THE FLD WAS PROCESSED SUPIFR SLJ RS . RESTORE THE TRIADS SSL AA1,2 JNB AA1,$+5 . IF FLD WAS MINUS PERMUTE JUMPS L AA1,ITEM+2 L AA1,ITEM+3 S AA1,ITEM+3 S AA2,ITEM+2 L AA1,ITEM+2 TNE AA1,ITEM+3 J STUPB L AA1,ITEM+1 TE AA1,ITEM+3 SLJ STUP STUPA SLJ GEN PCI 0,SVTBL+10 . ACTUAL PARAMETER PCI 0,ITEM+2 . ZERO JUMP PCI 0,ITEM+3 . POSITIVE JUMP EX $+1 J *STUPIF STUPR L,S1 AA1,ITEM+1 TNE,M AA1,7 J *STUP L,H1 AA1,N5ERLA . INTERNAL SEQUENCE NUMBER S,H1 AA1,STUPM LMJ B11,ERFP +STUPM J *STUP STUPB SLJ STUP . DIAGNOSTIC UNLESS DUMMY SLJ GEN PCI 0,ITEM+2 TE,ID P1,$+2,7 MI 1,(J P1) EX PHS5G SVR L BB2,TT2+1,BB1 SZ SVTBL+9 L,S3 AA1,TT2+3,BB1 S AA1,SVTBL+17 L,S1 AA1,TT2+1,BB1 L AA2,TT2+1,BB1 S AA2,SVTBL+10 TNE,M AA1,6 J SV1 . A TRIAD REFERENCE_ J *SV SV1 S BB2,SVTBL+9 . SAVE FIRST TRIAD THIS SHOULD HAVE L B11,TT1,BB2 L AA1,TT1,BB2 . AN OPERATOR OR A SEMICOLON S AA1,SVTBL+6 . AN OPERATOR IF IT DOES NOT L AA1,TT2,BB2 . IT IS AN ERROR S AA1,SVTBL+7 L AA1,TT3,BB2 S AA1,SVTBL+8 L,S2 AA1,TT3,BB2 TE,M AA1,017 . A SUBSCRIPT REQUIRES ANOTHER TRIAD J *SV S B11,SVTBL+5 L AA1,TT1,B11 S AA1,SVTBL+2 L AA1,TT2,B11 S AA1,SVTBL+3 L AA1,TT3,B11 S AA1,SVTBL+4 J *SV FLDJ . FIELD SPECIFICATIONS WHICH ARE J DESIGNATORS FJ FORM 6,4,8,9,9 . DUMMY, J FACTOR, SIGN EXT, F,N FJ 0,7,2,0,12 . T1 FJ 0,6,2,12,12 . T2 FJ 0,5,2,24,12 . T3 FJ 0,0,0,0,36 . WHOLE WORD FJ 0,2,FLDJSX-$,0,18 . H1 FJ 0,1,FLDJSX+1-$,18,18 . H2 FJ 0,13,0,0,6 S1 FJ 0,12,0,6,6 S2 FJ 0,11,0,12,6 S3 FJ 0,10,0,18,6 S4 FJ 0,9,0,24,6 S5 FJ 0,8,0,30,6 S6 FJ 0,7,0,0,9 Q1 FJ 0,4,0,9,9 Q2 FJ 0,6,0,18,9 Q3 FJ 0,5,0,27,9 Q4 FLDJSX FJ 0,4,1,0,18 XH1 FJ 0,3,2,18,18 XH2 $(2) . DO LMSC ,FNIO3U* SLJ ('ATH01$') . WILL BE SLJ NI03$ . FOR OLD LIBRARY DO LMSC ,FNI04U* SLJ ('ATH02$') . WILL BE SLJ NIO4$ . FOR OLD LIBRARY DO JPL ,FNIO3U* SLJ ('ATH3$ ') DO JPL ,FNIO4U* SLJ ('ATH4$ ') RTS +0 . NON ZERO ON LEFT SIDE OF EQUALS OFFSET +0 . NON ZERO IF FLD IN SECOND WORD FLDA2 DSC P0,$-$ FLDA3 DSL P0,$-$ FLDA3S DSA P0,$-$ FLDSEX +0 FLDA4 LSSC P0,$-$ FLDA5 DSL P0,$-$ FLDA7 LDSC P0,$-$ FLDA9 LSSL P0,$-$ FLERA +0,015005 FLD76 J $-$ J FLD76R RS J $-$ J RSR STUPIF J $-$ J SUPIFR STUPM +0115003 . WARNING THAT FLD CAN BE NEGATIVE STUP J $-$ J STUPR SV J $-$ J SVR END