qui_bi Project Status | |||
Project File: | qui_bi.ise | Implementation State: | New (Failed) |
Module Name: | D_Latch |
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Target Device: | xc5vlx30-3ff324 |
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Product Version: | ISE 11.1 |
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Design Goal: | Balanced |
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Design Strategy: | Xilinx Default (unlocked) |
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Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | ||||||
Translation Report | ||||||
Map Report | ||||||
Place and Route Report | ||||||
Power Report | ||||||
Post-PAR Static Timing Report | ||||||
Bitgen Report |
Secondary Reports | [-] | ||
Report Name | Status | Generated |