Dwg_729087 Project Status | |||
Project File: | Dwg_729087.ise | Implementation State: | New |
Module Name: | JLVB_P |
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Target Device: | xa95*xl-** |
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Product Version: | ISE 11.1 |
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Design Goal: | Balanced |
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Design Strategy: | Xilinx Default (unlocked) |
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Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | ||||||
Translation Report | ||||||
CPLD Fitter Report (Text) | ||||||
Power Report |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
Post-Fit Simulation Model Report |